What's New:
- Implemented a configuration option to protect the BIOS boot ROM block.
- Fixed BIOS flash ROM issues.
- Optimized BIU memory read caching.
- Implemented x86 SMM on Pentium, Pentium Pro and Pentium II processors.
- Improved hidden IDTR/GDTR cache emulation to include access rights.
- Improved x86 PAE loading and caching of the PDPT entries.
- Improved PAE and PSE reserved bits faulting.
- Improved CR4 PGE emulation to flush caches when needed.
- Improved debug messages.
- Improved ejected CD-tray to show an icon of an ejected CD-ROM disc tray.
- Implemented i430fx/i440fx/i450gx STPCLK signal and CPU halting.
- Made SMRAM compatible with 4 CPUs instead of just two CPUs.
- Fully implemented i430fx/i440fx/i450gx SMI.
- Improved ATAPI IRQ handling when finishing a command.
- Implemented APIC SMI triggers.
- Implemented serial control lines to immediately send control signals without timing when nothing is queued.
- Improved APIC reads and writes to non-existing addresses to always be zeroed.
- Implemented IO APIC SMI signal mapping.
- Implemented i450gx 512K memory block to be properly unmapped if required to be unmapped.
- Fixed APIC unmapped error status to work correctly again.
- STPCLK blocks interrupts only.
- Improved STPCLK to affect instruction boundaries only outside of SMM.
- Improved NMI masking to be performed at the CPU itself.
- Implemented STPCLK during NMI handling.
- Improved interrupt masking during SMM, NMI and STPCLK assertion.
- Ignore STPCLK for interrupt handling by (A)PIC during SMM and NMI handling.
- Simplified memory address precalcs to not be using reserved memory.
- Fixed maximum memory to be using the proper translated address.
- Fixed Compaq mid memory block lowering.
- Cleaned up MMU mapping code unused variables.
- Improved the information row to allow dynamic content.
- Fixed debugging row to display content correctly.
- Fixed i430fx memory remapping.
- Restored Compaq mid memory remapping.
- Fixed ISA memory hole start address.
- Fixed SMM to force a CPL of 0.
- Implemented CR0 and CR4 register validation and shutdown when executing RSM.
- Fixed SMM RSM shutdown detection when verifying CR0/CR4.
- Improved directory autodetection support.
- Made directory support more cross-platform.
- Made path seperators proper on non-linux paths.
- Made the Sound Blaster IRQ configurable as a architecture setting.
- Split the GPU functionality into the GPU unit from the headers.
- Fixed code to compile again with the new common settings support.
- Fixed input settings to be properly updated again.
- Cleaned up 386 opcodes.
- Cleaned up MMU variables.
- Made the video card input to the 8042 setting a parameter to the initialization function.
- Moved the CMOS loading and saving support to the BIOS.
- Fixed missing CMOS function in the BIOS module.
- Moved all architecture-specific hardware settings to be automatically loaded into and from the architecture-specific settings instead of global settings.
- Fixed converting from the old settings file format to the new settings file format.
- Fixed the settings version to be compatible with older versions again.
- Fixed CMOS saving to properly leave the new transferred fields alone in the settings file.
- Fixed missing comments needing to be moved to the CMOS fields.
- Cleaned up settings loading code.
- Renamed the video 'synchronization' setting field to become 'videocardsynchronization'.
- Moved not common PS/2 keyboard data to the PS/2 keyboard module.
- Fixed kp* key shift handling.
- Implemented backing storage for all XT RTC registers.
- Implemented the XT RTC status register.
- Implemented the XT RTC counter/RAM reset writes.
- Implemented the XT RTC "GO" command.
- Implemented the XT RTC Alarm function in with limited compatibility.
- Properly trigger OPL2 CSM note-off.
- Fixed OPL2 CSM forcing a key on.
- Made the 320us timer use further division of the 80us clock.
- Implemented different XT RTC Synchronization modes. It can now not synchronize again, fully synchronize or synchronize to 100th or whole seconds.
- Improved the OPL2 timer control register to behave better than it did before with timer status flags, clearing them in some cases.
- Updated the common emulator framework to the latest commit.
- Cleaned up CMOS time updating code.
- Fixed scancode set 0 tilde key break scancode.
- Updated SDL2 on Windows and Android to version 2.26.1