What's New:
UI: implement a 'Use integer scaling' option
UI: allow limiting the screen scale
UI: allow accessing the menu during fullscreen gameplay
UI: allow setting a custom save folder
Core: implement save compatibility with mGBA 0.10.0+
Core: implement basic support for the mGBA logging interface
PPU: rewrite the PPU to be mostly cycle-accurate
PPU: implement the GREENSWAP register
PPU: use the 6-th green channel bit during blending
PPU: round the blending result to the nearest integer
ARM: fix a minor timing oversight in ARM mode
ARM: SWP and SWPB should lock the bus (no DMA interleave is possible)
ARM: do not force-align mis-aligned PC in ARM mode
Bus: allow the CPU to execute idle cycles in parallel to DMA
Bus: more accurately emulate disabling the prefetch buffer
Bus: force the first CPU access after a DMA to be non-sequential
Bus: implement penalty for ROM code access during the last ROM prefetch cycle
IRQ: delay IO writes by one cycle
IRQ: delay update of the IE&IF condition for unhalting the CPU
SIO: implement basic serial transfer timing
APU: emulate the master enable bit
APU: cancel a potentially pending event whan starting a channel
Scheduler: allow for (de)serialization of events for save states